119#ifdef _CHIBIOS_RT_CONF_VER_6_1_
133 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
137 .cr2 = SPI_CR2_16BIT_MODE
141 [0] = {.port = NULL, .pad = 0},
142 [1] = {.port = NULL, .pad = 0},
143 [2] = {.port = NULL, .pad = 0},
144 [3] = {.port = NULL, .pad = 0},
146 [4] = {.port = NULL, .pad = 0},
147 [5] = {.port = NULL, .pad = 0},
148 [6] = {.port = NULL, .pad = 0},
149 [7] = {.port = NULL, .pad = 0},
150 [8] = {.port = NULL, .pad = 0},
151 [9] = {.port = NULL, .pad = 0},
152 [10] = {.port = NULL, .pad = 0},
155 .pwm_gpio = {.port = NULL, .pad = 0},
165#ifdef _CHIBIOS_RT_CONF_VER_6_1_
179 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
183 .cr2 = SPI_CR2_16BIT_MODE
185 .reset = {.port = NULL, .pad = 0},
188 [0] = {.port = GPIOE, .pad = 14},
189 [1] = {.port = GPIOE, .pad = 13},
190 [2] = {.port = GPIOE, .pad = 12},
191 [3] = {.port = GPIOE, .pad = 11},
194 [4] = {.port = NULL, .pad = 0},
195 [5] = {.port = NULL, .pad = 0},
196 [6] = {.port = NULL, .pad = 0},
197 [7] = {.port = NULL, .pad = 0},
199 [8] = {.port = GPIOE, .pad = 10},
200 [9] = {.port = GPIOE, .pad = 9},
201 [10] = {.port = GPIOE, .pad = 8},
202 [11] = {.port = GPIOE, .pad = 7},
207 [2] = {.output = 21},
208 [3] = {.output = 22},
210 .ign_en = {.port = GPIOD, .pad = 10},
211 .inj_en = {.port = GPIOD, .pad = 11},